XinAn PCB
DFM Design Guide
Design for manufacturability best practices to optimize your PCB design
Design for Manufacturability (DFM) is the practice of designing PCBs so they can be reliably fabricated, assembled, and tested at the target cost and yield. A design that ignores manufacturing constraints will result in higher cost (wider tolerances require more process steps), lower yield (features at the edge of capability fail more often), and longer lead time (engineering queries and re-spins).
The guidelines in this document represent our standard manufacturing capabilities. Designing to these recommendations — rather than pushing absolute minimums — will result in faster quotes, fewer engineering questions, and higher first-pass yield. We provide these guidelines to help designers make informed decisions early in the layout phase, when changes are cheap.
Every order receives a free DFM review from our engineering team before production begins. We check for common issues (acid traps, slivers, missing solder mask dams, drill-to-copper violations) and report them before any material is committed. This review catches most manufacturability problems, but designing with DFM in mind from the start produces better results than relying on post-layout corrections.
PCB Design Process Overview
The PCB design-to-manufacturing workflow starts with schematic capture and component selection, moves through layout and stackup definition, and ends with Gerber output and fabrication data review. DFM considerations should be factored in at every stage — from choosing component packages that match your assembly capability, to setting design rules that align with the fabricator's process limits.
Once your Gerber files are submitted, our CAM engineers run automated DRC (Design Rule Check) against our manufacturing capabilities, followed by manual review of the stackup, impedance requirements, and any special process notes. This review typically takes 2-4 hours. If we identify issues, we will provide a marked-up report with specific recommendations. Production begins only after the design is confirmed.
Trace Width & Spacing
| Item | Recommendation |
|---|---|
| Min trace width (1oz Cu) | >=3 mil (0.075 mm), prefer >=4 mil |
| Min trace width (2oz Cu) | >=5 mil (0.127 mm) |
| Min trace spacing (1oz Cu) | >=3 mil, prefer >=4 mil |
| Trace-to-edge clearance | >=10 mil (0.25 mm) |
| Copper pour to trace gap | >=8 mil (0.2 mm) |
| Impedance control tolerance | +-10% standard, +-5% available on request |
Drilling Design
| Item | Recommendation |
|---|---|
| Min mechanical drill (PTH) | 0.2 mm (8 mil), prefer >=0.3 mm |
| Min mechanical drill (NPTH) | 0.8 mm (31 mil) |
| Min via drill | 0.15 mm (6 mil) |
| Hole-to-hole spacing | >=6 mil (edge to edge) |
| Hole-to-edge clearance | >=10 mil from board edge |
| Aspect ratio (hole:board) | <=10:1 standard, <=12:1 on request |
| Annular ring (PTH) | >=4 mil (0.1 mm) |
Solder Mask Design
| Item | Recommendation |
|---|---|
| Min solder dam width | >=6 mil (0.15 mm), prefer >=8 mil |
| Solder mask registration | +-3 mil (0.075 mm) |
| Solder mask opening expansion | 2-3 mil per side over pad |
| Via tenting | Via diameter <=12 mil for reliable tenting |
| Available colors | Green, White, Black, Red, Blue, Yellow |
| Silkscreen min line width | >=5 mil (0.127 mm), height >=30 mil |
Panelization
| Item | Recommendation |
|---|---|
| Panel rail width | >=5 mm on each side |
| V-score line-to-trace | >=0.5 mm from V-score center to nearest copper |
| Tab-route bridge width | 3-5 mm with 0.5 mm perforations |
| Fiducial marks | 3 fiducials minimum per panel (for SMT) |
| Panel max size | 500 x 600 mm (multilayer), 650 x 2000 mm (1-2L) |
| Unit spacing in panel | >=1.6 mm (V-score), >=2.0 mm (tab-route) |
Layer Stackup
| Item | Recommendation |
|---|---|
| 2-layer standard stackup | 1.6 mm total, 1oz Cu top/bottom |
| 4-layer standard stackup | SIG-GND-PWR-SIG, 1.6 mm total |
| Prepreg selection | Choose prepreg based on impedance and thickness needs |
| Symmetry requirement | Layer stackup must be symmetrical to prevent warping |
| Copper balance | Balance copper on each layer pair to reduce bow & twist |
| Mixed copper weight | Available (e.g., 2oz outer + 1oz inner) |
Gerber File Submission
| Item | Recommendation |
|---|---|
| File format | Gerber RS-274X (preferred) or Gerber X2 |
| Drill file format | Excellon format with header info |
| Required layers (2L) | Top Cu, Bottom Cu, Top SM, Bot SM, Top Silk, Drill, Outline |
| Board outline | Separate mechanical layer or embedded in Gerber |
| File packaging | ZIP or RAR archive, max 50 MB |
| Include readme / notes | Specify stackup, impedance, special requirements |
Common EDA Software
Altium Designer
Full-featured PCB design tool widely used in professional product development. Supports unified schematic-to-layout workflow, 3D visualization, and integrated manufacturing output. Native Gerber, ODB++, and IPC-2581 export.
KiCad
Open-source EDA suite with schematic editor, PCB layout, 3D viewer, and Gerber generation. Increasingly adopted for professional and hobby projects. No license cost, active community, and regular updates.
Eagle (Autodesk)
Lightweight PCB design tool popular for small to mid-size designs. Cloud-based library management and Fusion 360 integration for mechanical collaboration. Now part of the Autodesk Fusion Electronics platform.
OrCAD / Allegro (Cadence)
Industry-standard tool for complex, high-speed, and high-density PCB designs. Advanced constraint-driven routing, signal integrity simulation, and manufacturing preparation. Used in enterprise and automotive design environments.
Common Design Mistakes
Trace width below minimum for copper weight
Check the fabricator's minimum trace/space table for your copper weight. 1oz allows 3/3 mil; 2oz requires 5/5 mil; 3oz requires 8/8 mil. Designing at the minimum increases reject risk — add margin where possible.
Missing solder mask dam between pads
Ensure solder mask dam width between adjacent pads is at least 6 mil. If the dam is too narrow, it will be stripped during fabrication, bridging adjacent pads and causing solder shorts during assembly.
Drill-to-copper clearance violation
Maintain at least 8 mil clearance between a drilled hole edge and the nearest non-connected copper feature. Violations can cause short circuits if the drill drifts within its registration tolerance.
Acid traps in acute-angle trace junctions
Avoid trace junctions with angles less than 90 degrees. Acute angles trap etchant during fabrication, causing over-etching and potential open circuits. Use 45-degree or curved bends instead.
Board outline not on a dedicated layer
Place the board outline on a separate mechanical layer (e.g., Mechanical 1 in Altium, Edge.Cuts in KiCad). If the outline is mixed with copper or silkscreen layers, the CAM engineer may misinterpret the board shape, causing incorrect routing or panelization.